? semiconductor components industries, llc, 2000 november, 2000 rev. 6 1 publication order number: mmdf1n05e/d mmdf1n05e power mosfet 1 amp, 50 volts nchannel so8, dual these miniature surface mount mosfets feature ultra low r ds(on) and true logic level performance. they are capable of withstanding high energy in the avalanche and commutation modes and the draintosource diode has a low reverse recovery time. minimos devices are designed for use in low voltage, high speed switching applications where power efficiency is important. typical applications are dcdc converters, and power management in portable and battery powered products such as computers, printers, cellular and cordless phones. they can also be used for low voltage motor controls in mass storage products such as disk drives and tape drives. the avalanche energy is specified to eliminate the guesswork in designs where inductive loads are switched and offer additional safety margin against unexpected voltage transients. ? ultra low r ds(on) provides higher efficiency and extends battery life ? logic level gate drive can be driven by logic ics ? miniature so8 surface mount package saves board space ? diode is characterized for use in bridge circuits ? diode exhibits high speed ? avalanche energy specified ? mounting information for so8 package provided ? i dss specified at elevated temperature maximum ratings (t j = 25 c unless otherwise noted) rating symbol value unit draintosource voltage v ds 50 volts gatetosource voltage continuous v gs 20 volts drain current continuous drain current pulsed i d i dm 2.0 10 amps single pulse draintosource avalanche energy starting t j = 25 c (v dd = 25 v, v gs = 10 v, i l = 2 apk) e as 300 mj operating and storage temperature range t j , t stg 55 to 150 c total power dissipation @ t a = 25 c p d 2.0 watts thermal resistance junction to ambient (note 1.) r q ja 62.5 c/w maximum temperature for soldering, time in solder bath t l 260 10 c sec 1. mounted on 2 square fr4 board (1 sq. 2 oz. cu 0.06 thick single sided) with one die operating, 10 sec. max. source1 1 2 3 4 8 7 6 5 top view gate1 source2 gate2 drain1 drain1 drain2 drain2 1 8 1 ampere 50 volts r ds(on) = 300 m device package shipping ordering information mmdf1n05er2 so8 2500 tape & reel so8, dual case 751 style 11 http://onsemi.com nchannel lyww marking diagram d s g f1n05 l = location code y = year ww = work week pin assignment
mmdf1n05e http://onsemi.com 2 electrical characteristics (t a = 25 c unless otherwise noted) characteristic symbol min typ max unit off characteristics draintosource breakdown voltage (v gs = 0, i d = 250 m a) v (br)dss 50 vdc zero gate voltage drain current (v ds = 50 v, v gs = 0) i dss 250 m adc gatebody leakage current (v gs = 20 vdc, v ds = 0) i gss 100 nadc on characteristics (note 2.) gate threshold voltage (v ds = v gs , i d = 250 m adc) v gs(th) 1.0 3.0 vdc draintosource onresistance (v gs = 10 vdc, i d = 1.5 adc) (v gs = 4.5 vdc, i d = 0.6 adc) r ds(on) r ds(on) 0.30 0.50 ohms forward transconductance (v ds = 15 v, i d = 1.5 a) g fs 1.5 mhos dynamic characteristics input capacitance (v 25 v v 0 c iss 330 pf output capacitance (v ds = 25 v, v gs = 0, f = 1.0 mhz ) c oss 160 reverse transfer capacitance f = 1 . 0 mhz) c rss 50 switching characteristics (note 3.) turnon delay time t d(on) 20 ns rise time (v dd = 10 v, i d = 1.5 a, r l = 10 w , t r 30 turnoff delay time (v dd 10 v , i d 1 . 5 a , r l 10 w , v g = 10 v, r g = 50 w ) t d(off) 40 fall time t f 25 total gate charge (v 10v i 15a q g 12.5 nc gatesource charge (v ds = 10 v, i d = 1.5 a, v gs = 10 v ) q gs 1.9 gatedrain charge v gs = 10 v) q gd 3.0 sourcedrain diode characteristics (t c = 25 c) forward voltage (note 2.) (i s = 1.5 a, v gs = 0 v) v sd 1.6 v reverse recovery time (i s 1 . 5 a , v gs 0 v) (di s /dt = 100 a/ m s) t rr 45 ns 2. pulse test: pulse width 300 m s, duty cycle 2.0%. 3. switching characteristics are independent of operating junction temperature.
mmdf1n05e http://onsemi.com 3 typical electrical characteristics 0.1 0 0 7 02 46 10 8 6 4 2 i d , drain current (amps) 10 8 6 4 2 0 024 6810 v ds , drain-to-source voltage (volts) figure 1. onregion characteristics figure 2. transfer characteristics figure 3. onresistance versus drain current figure 4. onresistance variation with temperature i d , drain current (amps) v gs , gate-to-source voltage (volts) r ds(on) , drain-to-source on-resistance (ohms) 02 4 6 8 i d , drain current (amps) t j , junction temperature ( c) -50 0 50 100 150 1.8 1.6 1.2 0.8 0.4 0 r ds(on) , drain-to-source on-resistance (normalized) v gs = 10 v 0.2 0.3 0.4 0.5 100 c 25 c -55 c 4 v 13 5 8 v gs = 10 v i d = 1.5 a t j = 25 c 5 v 6 v 25 c 0.2 0.6 1 1.4 -25 25 75 125 8 v 4.5 v 10 v -55 c 25 c 100 c -55 c v gs = 3.5 v v ds 10 v 100 c figure 5. on resistance versus gatetosource voltage figure 6. gate threshold voltage variation with temperature 150 125 100 75 50 25 0 -25 -50 1.2 1.1 1 0.9 0.8 0.7 v gs(th) , gate threshold voltage (normalized) t j , junction temperature ( c) v ds = v gs i d = 1 ma 0.5 0.4 0.3 0.2 0 23 t j , junction temperature i d = 1.5 a v gs = 0 0.1 45678910 r ds(on) , drain-to-source resistance (ohms)
mmdf1n05e http://onsemi.com 4 0 v gs v ds c iss c oss 16 10 6 0 12 10 8 6 4 2 0 q g , total gate charge (nc) v gs , gate-to-source voltage (volts) figure 7. capacitance variation 24 8 1214 figure 8. gate charge versus gatetosource voltage 1200 1000 800 600 400 0 20 10 0 20 c, capacitance (pf) gate-to-source or drain-to-source voltage (volts) 200 15 5 5 10 15 v ds = 25 v i d = 1.2 a v ds = 0 c iss c rss c rss v gs = 0 t j = 25 c 25 safe operating area information forward biased safe operating area the fbsoa curves define the maximum draintosource voltage and drain current that a device can safely handle when it is forward biased, or when it is on, or being turned on. because these curves include the limitations of simultaneous high voltage and high current, up to the rating of the device, they are especially useful to designers of linear systems. the curves are based on a case temperature of 25 c and a maximum junction temperature of 150 c. limitations for repetitive pulses at various case temperatures can be determined by using the thermal response curves. on semiconductor application note, an569, atransient thermal resistance general data and its useo provides detailed instructions. figure 9. maximum rated forward biased safe operating area 0.1 v ds , drain-to-source voltage (volts) 1 10 i d , drain current (amps) r ds(on) limit thermal limit package limit 0.01 v gs = 20 v single pulse t c = 25 c 10 0.1 dc 10 ms 1 100 100 mounted on 2 sq. fr4 board (1 sq. 2 oz. cu 0.06 thick single sided) with one die operating, 10s max. 100 m s 10 m s figure 10. thermal response t, time (s) rthja(t), effective transient thermal resistance 1 0.1 0.01 d = 0.5 single pulse 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 0.2 0.1 0.05 0.02 0.01 1.0e+02 1.0e+03 0.001 10 0.0175 w 0.0710 w 0.2706 w 0.5776 w 0.7086 w 107.55 f 1.7891 f 0.3074 f 0.0854 f 0.0154 f chip ambient normalized to q ja at 10s.
mmdf1n05e http://onsemi.com 5 information for using the so8 surface mount package minimum recommended footprint for surface mounted applications surface mount board layout is a critical portion of the total design. the footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. with the correct pad geometry, the packages will selfalign when subjected to a solder reflow process. mm inches 0.060 1.52 0.275 7.0 0.024 0.6 0.050 1.270 0.155 4.0 so8 power dissipation the power dissipation of the so8 is a function of the input pad size. these can vary from the minimum pad size for soldering to the pad size given for maximum power dissipation. power dissipation for a surface mount device is determined by t j(max) , the maximum rated junction temperature of the die, r q ja , the thermal resistance from the device junction to ambient; and the operating temperature, t a . using the values provided on the data sheet for the so8 package, p d can be calculated as follows: p d = t j(max) t a r q ja the values for the equation are found in the maximum ratings table on the data sheet. substituting these values into the equation for an ambient temperature t a of 25 c, one can calculate the power dissipation of the device which in this case is 2.0 watts. p d = 150 c 25 c 62.5 c/w = 2.0 watts the 62.5 c/w for the so8 package assumes the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 2.0 watts using the footprint shown. another alternative would be to use a ceramic substrate or an aluminum core board such as thermal clad . using board material such as thermal clad, the power dissipation can be doubled using the same footprint. soldering precautions the melting temperature of solder is higher than the rated temperature of the device. when the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. ? always preheat the device. ? the delta temperature between the preheat and soldering should be 100 c or less.* ? when preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. when using infrared heating with the reflow soldering method, the difference shall be a maximum of 10 c. ? the soldering temperature and time shall not exceed 260 c for more than 10 seconds. ? when shifting from preheating to soldering, the maximum temperature gradient shall be 5 c or less. ? after soldering has been completed, the device should be allowed to cool naturally for at least three minutes. gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. ? mechanical stress or shock should not be applied during cooling * soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device.
mmdf1n05e http://onsemi.com 6 package dimensions style 11: pin 1. source 1 2. gate 1 3. source 2 4. gate 2 5. drain 2 6. drain 2 7. drain 1 8. drain 1 seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 x y g m y m 0.25 (0.010) z y m 0.25 (0.010) z s x s m xxxxxx alyw so8 case 75107 issue v
mmdf1n05e http://onsemi.com 7 notes
mmdf1n05e http://onsemi.com 8 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information central/south america: spanish phone : 3033087143 (monfri 8:00am to 5:00pm mst) email : onlitspanish@hibbertco.com tollfree from mexico: dial 018002882872 for access then dial 8662979322 asia/pacific : ldc for on semiconductor asia support phone : 3036752121 (tuefri 9:00am to 1:00pm, hong kong time) toll free from hong kong & singapore: 00180044223781 email : onlitasia@hibbertco.com japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mmdf1n05e/d minimos is a trademark of semiconductor components industries, llc (scillc). thermal clad is a registered trademark of the bergquist company. north america literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com fax response line: 3036752167 or 8003443810 toll free usa/canada n. american technical support : 8002829855 toll free usa/canada europe: ldc for on semiconductor european support german phone : (+1) 3033087140 (monfri 2:30pm to 7:00pm cet) email : onlitgerman@hibbertco.com french phone : (+1) 3033087141 (monfri 2:00pm to 7:00pm cet) email : onlitfrench@hibbertco.com english phone : (+1) 3033087142 (monfri 12:00pm to 5:00pm gmt) email : onlit@hibbertco.com european tollfree access*: 0080044223781 *available from germany, france, italy, uk, ireland
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